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图像/点云配准建模芯片加速领域文献调研报告


一、文献时序排序与逐篇介绍

1. A VLSI Architecture for Image Registration in Real Time (2007)

2. A Programmable Vision Chip Based on Multiple Levels of Parallel Processors (2011)

3. High-Performance SIFT Hardware Accelerator for Real-Time Image Feature Extraction (2012)

4. Edge-Directed Hardware Architecture for Real-Time Disparity Map Computation (2013)

5. An Energy Efficient Full-Frame Feature Extraction Accelerator With Shift-Latch FIFO in 28 nm CMOS (2014)


(因篇幅限制,此处仅展示部分文献,完整列表见文末表格及参考文献)


二、国内外研究现状及发展动态分析

图像/点云配准建模芯片加速领域呈现显著技术演进趋势:

  1. 算法-硬件协同设计:从早期单一功能加速(如SIFT、SLAM)转向跨层次优化(如PointAcc、FLNA),通过数据结构重构(如稀疏张量、八叉树)与硬件架构创新(如CIM、FPGA异构系统)实现性能突破。

  2. 能效优先:研究重点从单纯性能提升转向能效优化(如Navion 2mW VIO、GPCIM 28.3 TOPS/W),边缘计算需求推动低功耗设计(如亚阈值电路、模拟域处理)。

  3. 新型计算范式:忆阻器交叉开关(Hong et al., 2024)、混合信号近传感器处理(Lefebvre & Bol, 2024)等非传统架构涌现,突破冯·诺依曼瓶颈。

  4. 多模态与可扩展性:研究从单一任务加速(如kNN搜索)转向多模态融合(Feng et al., 2025)和端到端系统优化(Jung et al., 2024)。

科学意义


三、文献调研综合结果

1. 重要里程碑

2. 性能、面积与功耗趋势

3. 现有方案不足


四、关键参数对比表格

文献(作者+年份)任务类型采用的算法主要优化策略实现平台
Gupta et al. (2007)图像配准NCCF/MSE/BST脉动阵列架构,256窗口处理器未说明
Zhang et al. (2011)通用视觉处理多级并行算法可编程PE阵列,动态像素-PE映射定制芯片
Jeon et al. (2014)特征提取优化SURF低功耗FIFO,圆形采样区域28nm CMOS
Chen et al. (2017)CNN加速行静态数据流四级内存层次,行程长度压缩定制ASIC
Lin et al. (2021)点云处理基于排序的统一映射可配置缓存,时间融合TSMC 40nm
Jung et al. (2024)LiDAR SLAM球坐标分箱搜索两步工作负载平衡,伪随机数生成器专用处理器
Lefebvre & Bol (2024)特征提取电荷域4位MAC混合信号处理,增量复位采样UMC 0.11μm CMOS
Feng et al. (2025)BEV感知可重构互连拓扑CAM映射单元,芯片级并行28nm CMOS

五、技术路线图(Roadmap)

1. 数据结构优化

2. 算法轻量化

3. 架构设计

4. 新兴技术


六、参考文献列表

[1] N. Gupta and N. Gupta, "A VLSI Architecture for Image Registration in Real Time," IEEE Transactions on Circuits and Systems, 2007.
[2] W. Zhang et al., "A Programmable Vision Chip Based on Multiple Levels of Parallel Processors," IEEE Journal of Solid-State Circuits, 2011.
[3] D. Jeon et al., "An Energy Efficient Full-Frame Feature Extraction Accelerator With Shift-Latch FIFO in 28 nm CMOS," ISSCC, 2014.
[4] Y.-H. Chen et al., "Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks," IEEE Journal of Solid-State Circuits, 2017.
[5] Y. Lin et al., "PointAcc: Efficient Point Cloud Accelerator," MICRO, 2021.
[6] J. Jung et al., "An Energy-Efficient Processor for Real-Time Semantic LiDAR SLAM," IEEE Journal of Solid-State Circuits, 2024.
[7] M. Lefebvre and D. Bol, "MANTIS: A Mixed-Signal Near-Sensor Convolutional Imager SoC," IEEE Journal of Solid-State Circuits, 2024.
[8] X. Feng et al., "A Scalable BEV Perception Processor for Image/Point Cloud Fusion," IEEE Journal of Solid-State Circuits, 2025.


注:完整参考文献列表包含所有分析文献,此处因篇幅限制仅示例部分条目。